国際交流助成受領者/国際会議参加レポート

平成26年度 国際交流助成受領者による国際会議参加レポート

受領・参加者名
張 任遠
(北陸先端科学技術大学院大学)
会議名
The 24th Great Lake Symposium on VLSI
期日
2014年5月21日~23日
開催地
Houston, Texas, USA

1. 国際会議の概要

Fig. 1-1. The main hall of presentations
for GLSVSLI while opening ceremony.

The Great Lake Symposium on VLSI is one of most impacting technical events in the field of very large scale integrated (VLSI) development, which is usually held in United States. The 24th edition of this symposium in this year was held in Houston, Taxes. Originally, GLSVLSIs appear in the Great Lake region of USA referred to its name. However, the committee of GLSVLSI14 considers that Houston is linked to the Great Lake by a river.

Regarding the Technical scope, GLSVLSI covers all the relevant areas of VLSI development including: VLSI Design, VLSI Circuits, Computer-Aided Design (CAD), Low Power and Power Aware Design, Testing, Reliability, Fault-Tolerance, end Emerging Technologies & Post-CMOS VLSI. It has been sponsored by worldwide societies such as IEEE and ACM. The symposium agenda is organized by a part of parallel oral presentations and poster presentations, along with full technical papers (6-page) and short papers (2-pagers), respectively. In this year, all the papers are published in ACM digital library.

In GLSVLSI'14, a large number of papers from 44 countries were submitted and screened strictly. The acceptance rate is only 26.4%. Namely, it is very competitive.

2. 研究テーマと討論内容

Fig. 2-1. I was answering the
questions according to my presentation.

Fig. 2-2. Looking through
the poster presentation hall.

Our work titled “A Feasibility Study on Robust Programmable Delay Element Design based on Neuron-MOS Mechanism” was selected as oral presentation. I made the presentation in the first session of the symposium, which followed the opening ceremony. The feasibility of programmable delay elements (PDEs) design based on Neuron-MOS mechanism is investigated in this paper. By applying capacitor coupling technology, the digital programmability for generating various delays is realized in stead of long channel transistors. Our proposal achieves superior performances than conventional PDEs over power consumption, delay range, robustness against process variations and temperatures.

We received some questions worry about the chip-area cost of capacitors. In factor, we clarify this issue in our full paper but not mentioned in my talk in detailed. The capacitors for Neuron-MOS are not really charged; only the potential is concerned. Thus, very small values of capacitance are sufficient to behave correct function.

In addition, I also asked and commented on several interesting works on the poster sessions about circuits reliability improvement.

3. 国際会議に出席した成果
(コミュニケーション・国際交流・感想)

Our work on robust PDE designs was positively evaluated by other researchers. I also received many helpful comments on our future works. In GLSVLSI'14, the reliability efforts were greatly highlighted, which is exact direction we are interested in. In addition, I saw an increased number of works on 3-D technologies appearing in such kind of conferences. It indicates a potential for our further researches in 3-D relevant topics.

Fig. 3-1. Professor Gene Frantz gave his
Gala speech titled “Create, then Innovate”.

Another inspiring topic, not in technique but in science philosophy, appeared in the Gala speech by Professor Gene Frantz, titled “Create, then Innovate”. Prof. Frantz listed three important issues in Sci. & Tech. explorations: “asking right questions (for scientists); choose right questions; answer questions (for engineers)”. Personally, I consider myself or people like me as a cross between scientists and engineers. Thus, I would like to pay most of my intelligence (if any) on choosing some right questions to answer. And I think the S&T philosophy could be more important than technical skills somehow.

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